The invention relates to methods for fabricating a germanium on insulator (GeOI) type wafer.
Germanium is an interesting material to use when fabricating semiconductor devices because of its high mobility characteristics for electrons and holes. Currently, more silicon devices are being fabricated on silicon on insulator (SOI) type wafers to prevent leakage currents, and the same trend is occurring with respect to devices grown on germanium. The major difference between silicon and germanium is the fact that, unlike stable silicon dioxide, native germanium oxide is not stable enough to be the dielectric in a GeOI type wafer. To overcome this problem, silicon dioxide-like layers have been proposed for use as the dielectric, such as low temperature oxide (LTO) layers, silicon dioxide made from TEOS or SiH4, tetra-ethyl-ortho-silicate (TEOS) or high temperature oxides (HTO), or non oxide-like layers such as silicon nitride (Si3N4) or germanium nitride (Ge3N4). These layers are usually deposited by a low pressure chemical vapor deposition (LPCVD) process, or by a plasma enhanced chemical vapor deposition (PECVD) process. The dielectrics are deposited on a bulk germanium wafer or, for instance, on a thin germanium layer which has previously been provided on another type of wafer such as a silicon wafer or a silicon carbide wafer, which are cheaper than a germanium wafer.
Depositing an auxiliary dielectric layer, however, causes several problems. First, depositing an auxiliary layer of a dielectric material means that the interface layer between the SiO2 layers and Ge layer is not well controlled. The quality of the interface depends on the type of surface preparation conducted on the Ge layer prior to deposition (such as cleaning). Second, it is necessary to carry out a thermal annealing in order to improve the structural as well as the electrical properties of the deposited layers. Third, the deposited layers exhibit increased roughness as compared to thermally grown layers, and therefore polishing is necessary in order to improve the surface quality of the deposited and annealed oxide. During fabrication of a GeOI wafer the surface quality of the dielectric layer plays an important role because this surface is next bonded to a handle substrate.
Conventionally, a GeOI type wafer is created by providing a source substrate, like a germanium (Ge) substrate or a substrate that includes an epitaxial germanium layer, with the deposited, annealed and polished dielectric layer on one main surface. Next, the structure is attached to a handle substrate to form a source-handle structure, and then a thin Ge layer is transferred together with the dielectric layer onto the handle substrate by detaching a portion of the source substrate at a previously created weakened area. The weakened area is generally parallel to a main surface of the source substrate. Because the native germanium oxide cannot be used as a dielectric on a GeOI type wafer, and because other types of oxides or nitrides need to be deposited, annealed and polished, typically such GeOI wafers suffer from low quality dielectric films, a low production through-put, and as a further consequence a high cost per wafer.